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| author |   Jiansong Chen <Jiansong.Chen@amd.com> | 2020-08-27 14:31:20 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2020-08-27 10:09:14 -0400 |
| commit | ce7e5a6e130d4fe76e09bd082e98b65f630aa474 (patch) | |
| tree | d2a1797cfec83c0834c8983ccdb95be60db25982 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/amdgpu: simplify hw status clear/set logic (diff) | |
| download | wireguard-linux-ce7e5a6e130d4fe76e09bd082e98b65f630aa474.tar.xz wireguard-linux-ce7e5a6e130d4fe76e09bd082e98b65f630aa474.zip | |
drm/amd/pm: enable MP0 DPM for sienna_cichlid
Enable MP0 clock DPM for sienna_cichlid.
Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions