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author | 2022-03-21 11:11:48 -0700 | |
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committer | 2022-03-21 11:11:48 -0700 | |
commit | d752e211146586dd654537a8b5282a6cf08a568f (patch) | |
tree | c24ab95b06689374e951ba45028e8f6c04aef144 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | Merge tag 'edac_updates_for_v5.18_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras (diff) | |
parent | x86/cpu: Clear SME feature flag when not in use (diff) | |
download | wireguard-linux-d752e211146586dd654537a8b5282a6cf08a568f.tar.xz wireguard-linux-d752e211146586dd654537a8b5282a6cf08a568f.zip |
Merge tag 'x86_cpu_for_v5.18_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 cpu feature updates from Borislav Petkov:
- Merge the AMD and Intel PPIN code into a shared one by both vendors.
Add the PPIN number to sysfs so that sockets can be identified when
replacement is needed
- Minor fixes and cleanups
* tag 'x86_cpu_for_v5.18_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/cpu: Clear SME feature flag when not in use
x86/cpufeatures: Put the AMX macros in the word 18 block
topology/sysfs: Add PPIN in sysfs under cpu topology
topology/sysfs: Add format parameter to macro defining "show" functions for proc
x86/cpu: Read/save PPIN MSR during initialization
x86/cpu: X86_FEATURE_INTEL_PPIN finally has a CPUID bit
x86/cpu: Merge Intel and AMD ppin_init() functions
x86/CPU/AMD: Use default_groups in kobj_type
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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