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authorEvan Quan <evan.quan@amd.com>2020-07-08 12:45:00 +0800
committerAlex Deucher <alexander.deucher@amd.com>2020-07-21 15:37:38 -0400
commitd8e0b16d818ebd76386029fe098cddbae49bfaf5 (patch)
tree184b5f5203359afbbffeac4ff0c309ffa0015493 /tools/perf/scripts/python/export-to-postgresql.py
parentdrm/amd/powerplay: revise the calling flow on OD table update (diff)
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drm/amd/powerplay: tag swSMU code layers
Per designs, the swSMU code is separated into four layers. And the typical calling flow should be like: amdgpu_smu.c -> ${asic}_ppt.c -> smu_v11/12_0.c -> smu_cmn.c. Compile errors will come out for any violations. This can help to prevent cross callings(e.g. amdgpu_smu.c -> ${asic}_ppt.c -> amdgpu_smu.c -> ${asic}_ppt.c) which were common in our code. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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