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| author |   Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2022-02-09 23:22:32 +0000 |
|---|---|---|
| committer |   Wolfram Sang <wsa@kernel.org> | 2022-03-01 16:05:01 +0100 |
| commit | da2e86c0bd7bc6fdb116dd03c041cf816205cbdc (patch) | |
| tree | b50936315ca3063316911c1c4bc11f038b254622 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | dt-bindings: i2c: microchip,corei2c: Fix indentation of compatible items (diff) | |
| download | wireguard-linux-da2e86c0bd7bc6fdb116dd03c041cf816205cbdc.tar.xz wireguard-linux-da2e86c0bd7bc6fdb116dd03c041cf816205cbdc.zip | |
i2c: riic: Simplify reset handling
Read reset phandle as optional instead of exclusive so that all the DT's
passing the reset phandle can be used to assert/deassert the reset line.
With this change we don't have to differentiate the RZ/G2L SoC.
With the above changes we no longer need the "renesas,riic-r9a07g044"
compatible string, so drop it from riic_i2c_dt_ids[]. No changes are
required to the r9a07g044.dtsi as we already have "renesas,riic-rz" as a
fallback compatible string.
While at it, check the return code of reset_control_deassert() as it might
fail and also add a devres action to assert the reset line.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions