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| author |   AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2025-02-12 11:00:12 +0100 |
|---|---|---|
| committer | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2025-03-06 11:54:20 +0100 |
| commit | dfe4382b304a2108ce20090135123046cab00452 (patch) | |
| tree | 67c077b304cae8fd1c8d9647ec80842e33df6a51 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | soc: mediatek: mmsys: Migrate all tables to MMSYS_ROUTE() macro (diff) | |
| download | wireguard-linux-dfe4382b304a2108ce20090135123046cab00452.tar.xz wireguard-linux-dfe4382b304a2108ce20090135123046cab00452.zip | |
soc: mediatek: mt8188-mmsys: Add support for DSC on VDO0
Add routing paths to support Display Stream Compression on the
VDOSYS0 pipelines ending with DSI or DisplayPort (DP_INTF).
Link: https://lore.kernel.org/r/20250212100012.33001-9-angelogioacchino.delregno@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions