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| author |   Thierry Reding <treding@nvidia.com> | 2017-08-16 13:32:40 +0300 |
|---|---|---|
| committer |   Peter Chen <peter.chen@nxp.com> | 2017-08-24 17:40:52 +0800 |
| commit | dfebb5f43a78827a4a493048552e500f89fa3b31 (patch) | |
| tree | 5ccf75a35c0d46d478dab470943b5fb86df454fd /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | usb: chipidea: udc: Support SKB alignment quirk (diff) | |
| download | wireguard-linux-dfebb5f43a78827a4a493048552e500f89fa3b31.tar.xz wireguard-linux-dfebb5f43a78827a4a493048552e500f89fa3b31.zip | |
usb: chipidea: Add support for Tegra20/30/114/124
All of these Tegra SoC generations have a ChipIdea UDC IP block that can
be used for device mode communication with a host. Implement rudimentary
support that doesn't allow switching between host and device modes.
Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Signed-off-by: Thierry Reding <treding@nvidia.com>
[digetx@gmail.com: rebased patches and added DMA alignment quirk for Tegra20]
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions