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| author |   Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> | 2025-01-20 15:09:35 +0200 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2025-02-21 16:23:00 +0100 |
| commit | ec32d57b4bbf27d91c55c7a258bdb87690993ea6 (patch) | |
| tree | 722ce36b474ed6f93c53688646efbbf02fb01d49 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | arm64: dts: renesas: rzg3s-smarc-switches: Add a header to describe different switches (diff) | |
| download | wireguard-linux-ec32d57b4bbf27d91c55c7a258bdb87690993ea6.tar.xz wireguard-linux-ec32d57b4bbf27d91c55c7a258bdb87690993ea6.zip | |
arm64: dts: renesas: rzg3s-smarc: Enable SCIF3
Enable SCIF3. It is routed to the SER1_UART interface on the RZ SMARC
Carrier II board.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250120130936.1080069-4-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions