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| author |   Daniel Vetter <daniel.vetter@ffwll.ch> | 2020-01-28 17:09:52 +0100 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2020-01-30 17:15:42 -0500 |
| commit | ec3d65082d7dabad6fa8f66a8ef166f2d522d6b2 (patch) | |
| tree | bda401742d6eee66ea727d1fbb08869c3ac7c47c /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/amd/display: fix spelling mistake link_integiry_check -> link_integrity_check (diff) | |
| download | wireguard-linux-ec3d65082d7dabad6fa8f66a8ef166f2d522d6b2.tar.xz wireguard-linux-ec3d65082d7dabad6fa8f66a8ef166f2d522d6b2.zip | |
radeon: insert 10ms sleep in dce5_crtc_load_lut
Per at least one tester this is enough magic to recover the regression
introduced for some people (but not all) in
commit b8e2b0199cc377617dc238f5106352c06dcd3fa2
Author: Peter Rosin <peda@axentia.se>
Date: Tue Jul 4 12:36:57 2017 +0200
drm/fb-helper: factor out pseudo-palette
which for radeon had the side-effect of refactoring out a seemingly
redudant writing of the color palette.
10ms in a fairly slow modeset path feels like an acceptable form of
duct-tape, so maybe worth a shot and see what sticks.
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
References: https://bugzilla.kernel.org/show_bug.cgi?id=198123
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions