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| author |   Dinh Nguyen <dinguyen@kernel.org> | 2017-09-22 13:42:47 -0500 |
|---|---|---|
| committer |   Philipp Zabel <p.zabel@pengutronix.de> | 2017-10-04 10:29:44 +0200 |
| commit | f450f28e70a2378d9d6ded0932fe480055888cfa (patch) | |
| tree | f18259410861b6a69016cfcac9be0ee75888d28f /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | reset: Restrict RESET_HSDK to ARC_SOC_HSDK or COMPILE_TEST (diff) | |
| download | wireguard-linux-f450f28e70a2378d9d6ded0932fe480055888cfa.tar.xz wireguard-linux-f450f28e70a2378d9d6ded0932fe480055888cfa.zip | |
reset: socfpga: fix for 64-bit compilation
The SoCFPGA Stratix10 reset controller has 32-bit registers. Thus, we
cannot use BITS_PER_LONG in computing the register and bit offset. Instead,
we should be using the width of the hardware register for the calculation.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions