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| author |   Yong Zhi <yong.zhi@intel.com> | 2018-12-06 20:03:35 -0500 |
|---|---|---|
| committer |   Mauro Carvalho Chehab <mchehab+samsung@kernel.org> | 2018-12-14 05:29:01 -0500 |
| commit | f5f2e427351896fc55e6340567438e3e980d3012 (patch) | |
| tree | 54893375f7580ec966f5b4da4b46f0b09edd39e1 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | media: staging/intel-ipu3: css: Initialize css hardware (diff) | |
| download | wireguard-linux-f5f2e427351896fc55e6340567438e3e980d3012.tar.xz wireguard-linux-f5f2e427351896fc55e6340567438e3e980d3012.zip | |
media: staging/intel-ipu3: Add css pipeline programming
This provides helper library to be used by v4l2 level to program
imaging pipelines and control the streaming.
Signed-off-by: Yong Zhi <yong.zhi@intel.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions