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| author |   Patrice Chotard <patrice.chotard@st.com> | 2018-03-12 10:04:07 +0100 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2018-03-19 13:46:07 -0700 |
| commit | f9acf1057d5bfe56fcc0b8ee36787223ed3fc8be (patch) | |
| tree | a1bc3001ede31eb89feea96f374f83765b549f48 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | clk: stm32: Add DSI clock for STM32F469 Board (diff) | |
| download | wireguard-linux-f9acf1057d5bfe56fcc0b8ee36787223ed3fc8be.tar.xz wireguard-linux-f9acf1057d5bfe56fcc0b8ee36787223ed3fc8be.zip | |
clk: stm32: Add clk entry for SDMMC2 on stm32F769
STM32F769 has 2 SDMMC port, add clock entry for the second one.
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions