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| author |   Imre Deak <imre.deak@intel.com> | 2017-07-11 23:42:32 +0300 |
|---|---|---|
| committer |   Daniel Vetter <daniel.vetter@ffwll.ch> | 2017-07-27 09:38:50 +0200 |
| commit | fb9248e202df17cf731c76305f6015bf409179ca (patch) | |
| tree | 032dc527e33227a6c25ff315ef8596af8e8f06ad /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/i915/gen2: Add an ID for the display pipes power well (diff) | |
| download | wireguard-linux-fb9248e202df17cf731c76305f6015bf409179ca.tar.xz wireguard-linux-fb9248e202df17cf731c76305f6015bf409179ca.zip | |
drm/i915/hsw, bdw: Add an ID for the global display power well
Add an ID for the HSW/BDW global display power well for consistency. The
ID is selected so that it can be used to get at the HW request and
status flags with the corresponding GEN9+ macros. Unifying the HSW/BDW
and GEN9+ versions of these macros and the power well ops using them
will be done in follow-up patches.
v2:
- Rebased on v2 of patch 2.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170711204236.5618-3-imre.deak@intel.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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