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author | 2021-11-22 10:39:05 +0000 | |
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committer | 2021-11-26 14:08:19 +0100 | |
commit | fee3eae1334a454a8c2e16313a374cc53ff722d8 (patch) | |
tree | a0d9101c177c7305d0c9f797f34dc99075798538 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | arm64: dts: renesas: rzg2l-smarc-som: Enable serial NOR flash (diff) | |
download | wireguard-linux-fee3eae1334a454a8c2e16313a374cc53ff722d8.tar.xz wireguard-linux-fee3eae1334a454a8c2e16313a374cc53ff722d8.zip |
arm64: dts: renesas: r9a07g044: Rename SDHI clocks
Rename the below SDHI clocks to match with the clocks used in driver.
imclk->core
clk_hs->clkh
imclk2->cd
Also re-arrange the clocks to match with the sorting order used in the
binding document.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://lore.kernel.org/r/20211122103905.14439-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions