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author | 2018-08-27 21:53:40 +0300 | |
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committer | 2018-09-13 09:47:44 +0200 | |
commit | ffa967e24c5817b48a3d5ecea2c12b9cdd807f0c (patch) | |
tree | 23a4d0a6eee60ead6b20da3598e776b1c9d2d5ec /tools/perf/scripts/python/export-to-postgresql.py | |
parent | arm64: dts: renesas: r8a774a1: Add USB3.0 device nodes (diff) | |
download | wireguard-linux-ffa967e24c5817b48a3d5ecea2c12b9cdd807f0c.tar.xz wireguard-linux-ffa967e24c5817b48a3d5ecea2c12b9cdd807f0c.zip |
arm64: dts: renesas: r8a77980: add PCIe support
Describe the PCIe PHY, PCIEC, and PCIe bus clock in the R8A77980 device
tree.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions