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author | 2023-12-13 15:50:45 +0100 | |
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committer | 2023-12-13 18:33:43 +0100 | |
commit | 6c9dbee84cd005bed5f9d07b3a2797ae6414b435 (patch) | |
tree | 959e6fef98b030dbf2900ef82b9e06c6a28cda39 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | dt-bindings: panel-simple-dsi: move LG 5" HD TFT LCD panel into DSI yaml (diff) | |
download | wireguard-linux-6c9dbee84cd005bed5f9d07b3a2797ae6414b435.tar.xz wireguard-linux-6c9dbee84cd005bed5f9d07b3a2797ae6414b435.zip |
drm/panel: ltk050h3146w: Set burst mode for ltk050h3148w
The ltk050h3148w variant expects the horizontal component lane byte clock
cycle(lbcc) to be calculated using lane_mbps (burst mode) instead of the
pixel clock.
Using the pixel clock rate by default for this calculation was introduced
in commit ac87d23694f4 ("drm/bridge: synopsys: dw-mipi-dsi: Use pixel clock
rate to calculate lbcc") and starting from commit 93e82bb4de01
("drm/bridge: synopsys: dw-mipi-dsi: Fix hcomponent lbcc for burst mode")
only panels that support burst mode can keep using the lane_mbps. So add
MIPI_DSI_MODE_VIDEO_BURST as part of the mode_flags for the dsi host.
Fixes: 93e82bb4de01 ("drm/bridge: synopsys: dw-mipi-dsi: Fix hcomponent lbcc for burst mode")
Signed-off-by: Farouk Bouabid <farouk.bouabid@theobroma-systems.com>
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231213145045.41020-1-farouk.bouabid@theobroma-systems.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions