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| author |   Imre Deak <imre.deak@intel.com> | 2023-03-23 16:20:31 +0200 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2023-04-03 11:35:31 +0300 |
| commit | 9796a5b2725d1b3ddbbe7b1f3dec56af8cc6af22 (patch) | |
| tree | c4514c075df64af9240a5bce9c7dca6a8c22dff1 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/i915/tc: Don't connect the PHY in intel_tc_port_connected() (diff) | |
| download | wireguard-linux-9796a5b2725d1b3ddbbe7b1f3dec56af8cc6af22.tar.xz wireguard-linux-9796a5b2725d1b3ddbbe7b1f3dec56af8cc6af22.zip | |
drm/i915/adlp/tc: Align the connect/disconnect PHY sequence with bspec
Bspec has updated the TC connect/disconnect sequences, add the required
platform hooks for these.
The difference wrt. the old sequence is the order of taking the PHY
ownership - while holding a port power reference this requires - and
blocking the TC-cold power state.
Bspec: 49294
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-26-imre.deak@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions