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| author |   Zhang Rui <rui.zhang@intel.com> | 2022-08-18 21:26:23 +0800 |
|---|---|---|
| committer |   Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> | 2023-03-22 13:36:55 -0700 |
| commit | c7ff8ff3b29ee031a2194f67b5ceced9b77fdc21 (patch) | |
| tree | c8046e5f8d03e70c11ba8642b71c8869a092aadd /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | tools/power/x86/intel-speed-select: Hide invalid TRL level (diff) | |
| download | wireguard-linux-c7ff8ff3b29ee031a2194f67b5ceced9b77fdc21.tar.xz wireguard-linux-c7ff8ff3b29ee031a2194f67b5ceced9b77fdc21.zip | |
tools/power/x86/intel-speed-select: Remove cpu mask display for non-cpu power domain
Non CPU power domains will not have any CPUs. So don't display any CPU
count or enable mask.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: subject and changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions