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| author |   Mans Rullgard <mans@mansr.com> | 2016-03-18 16:24:43 +0200 |
|---|---|---|
| committer |   Vinod Koul <vinod.koul@intel.com> | 2016-04-13 21:36:10 +0530 |
| commit | df1f3a2305d72cbf470758999785f08bcd642d5d (patch) | |
| tree | e8af88f6543cad5d375fa7b8eb8058a269dae306 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | dmaengine: dw: set src and dst master select according to xfer direction (diff) | |
| download | wireguard-linux-df1f3a2305d72cbf470758999785f08bcd642d5d.tar.xz wireguard-linux-df1f3a2305d72cbf470758999785f08bcd642d5d.zip | |
dmaengine: dw: fix byte order of hw descriptor fields
If the DMA controller uses a different byte order than the host CPU,
the hardware linked list descriptor fields need to be byte-swapped.
This patch makes the driver write these fields using the same byte
order it uses for mmio accesses to the DMA engine. I do not know
if this is guaranteed to always be correct.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions