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author | 2023-05-29 11:13:57 +0200 | |
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committer | 2023-05-30 10:04:05 +0200 | |
commit | 45e418bd528f5c1ed6b8de7596cf523f10f74b7b (patch) | |
tree | b8cf8be4e7dc63435c9002192eb68b9803d230d9 /tools/perf/scripts/python/export-to-sqlite.py | |
parent | ARM: dts: stm32: fix warnings on stm32f469-disco board (diff) | |
download | wireguard-linux-45e418bd528f5c1ed6b8de7596cf523f10f74b7b.tar.xz wireguard-linux-45e418bd528f5c1ed6b8de7596cf523f10f74b7b.zip |
dt-bindings: display: st,stm32-dsi: Remove unnecessary fields
"#address-cells" and "#size-cells" are two properties that are not
mandatory. For instance, the DSI could refer to a bridge outside the scope
of the node rather than include a 'panel@0' subnode. By doing so, address
and size fields become then unnecessary, creating a warning at build time.
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions