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| author |   Maxime Ripard <maxime.ripard@bootlin.com> | 2019-08-21 16:38:35 +0200 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-08-23 12:02:07 +0200 |
| commit | 9e1975f0bca9ef9fc5d76f056cab7240e25bca76 (patch) | |
| tree | 4eb9785506dee33341a0f8908850827efec906a7 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | ARM: dts: sunxi: Add missing watchdog interrupts (diff) | |
| download | wireguard-linux-9e1975f0bca9ef9fc5d76f056cab7240e25bca76.tar.xz wireguard-linux-9e1975f0bca9ef9fc5d76f056cab7240e25bca76.zip | |
ARM: dts: sunxi: Add missing watchdog clocks
The watchdog has a clock on all our SoCs, but it wasn't always listed.
Add it to the devicetree where it's missing.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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