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| author |   Conor Dooley <conor.dooley@microchip.com> | 2022-02-14 13:58:38 +0000 |
|---|---|---|
| committer |   Palmer Dabbelt <palmer@rivosinc.com> | 2022-03-09 21:46:40 -0800 |
| commit | c5094f371008c5296a91594b6a24d506383afadb (patch) | |
| tree | 20856965fdeabdad6dd728515bdd35965f4775f3 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | riscv: dts: microchip: add fpga fabric section to icicle kit (diff) | |
| download | wireguard-linux-c5094f371008c5296a91594b6a24d506383afadb.tar.xz wireguard-linux-c5094f371008c5296a91594b6a24d506383afadb.zip | |
riscv: dts: microchip: refactor icicle kit device tree
Assorted minor changes to the MPFS/Icicle kit device tree:
- rename serial to mmuart to match microchip documentation
- move phy0 inside mac1 node to match phy configuration
- add labels where missing (cpus, cache controller)
- add missing address cells & interrupts to MACs
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions