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| author |   Dinh Nguyen <dinguyen@kernel.org> | 2019-07-30 09:07:04 -0500 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2019-07-30 09:09:31 -0500 |
| commit | d8c1ccac448fd21a3753517a34ee0164c28ac786 (patch) | |
| tree | d6777fbd12ad52cd454cfa47bd7b8ec749ef8dc3 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | ARM: dts: socfpga: Adjust GMAC1 clock and TXD lines skew on VINING FPGA (diff) | |
| download | wireguard-linux-d8c1ccac448fd21a3753517a34ee0164c28ac786.tar.xz wireguard-linux-d8c1ccac448fd21a3753517a34ee0164c28ac786.zip | |
ARM: dts: socfpga: add missing reset-names for dma
The dma dts node was missing the reset-names = "dma". The reset driver
needs this line to get the reset property.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions