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| author |   Anup Patel <anup.patel@wdc.com> | 2022-02-10 11:19:46 +0530 |
|---|---|---|
| committer |   Palmer Dabbelt <palmer@rivosinc.com> | 2022-03-10 09:29:56 -0800 |
| commit | 1bd524f7e8d8f194cd94bc4535df91391d0f1dc8 (patch) | |
| tree | 6483ac61aa7a3bc119bdbe5dfdc810ee01172cca /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | cpuidle: Add RISC-V SBI CPU idle driver (diff) | |
| download | wireguard-linux-1bd524f7e8d8f194cd94bc4535df91391d0f1dc8.tar.xz wireguard-linux-1bd524f7e8d8f194cd94bc4535df91391d0f1dc8.zip | |
dt-bindings: Add common bindings for ARM and RISC-V idle states
The RISC-V CPU idle states will be described in under the
/cpus/idle-states DT node in the same way as ARM CPU idle
states.
This patch adds common bindings documentation for both ARM
and RISC-V idle states.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions