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| author |   Tom Lendacky <thomas.lendacky@amd.com> | 2023-06-06 09:51:24 -0500 |
|---|---|---|
| committer |   Borislav Petkov (AMD) <bp@alien8.de> | 2023-06-06 18:29:00 +0200 |
| commit | 7006b75592feb1902563ac1decfd98d7e4a0dd6c (patch) | |
| tree | 8e1bbaab03f6e43c0698345228098b5d94d2e2e4 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | x86/sev: Put PSC struct on the stack in prep for unaccepted memory support (diff) | |
| download | wireguard-linux-7006b75592feb1902563ac1decfd98d7e4a0dd6c.tar.xz wireguard-linux-7006b75592feb1902563ac1decfd98d7e4a0dd6c.zip | |
x86/sev: Allow for use of the early boot GHCB for PSC requests
Using a GHCB for a page stage change (as opposed to the MSR protocol)
allows for multiple pages to be processed in a single request. In prep
for early PSC requests in support of unaccepted memory, update the
invocation of vmgexit_psc() to be able to use the early boot GHCB and not
just the per-CPU GHCB structure.
In order to use the proper GHCB (early boot vs per-CPU), set a flag that
indicates when the per-CPU GHCBs are available and registered. For APs,
the per-CPU GHCBs are created before they are started and registered upon
startup, so this flag can be used globally for the BSP and APs instead of
creating a per-CPU flag. This will allow for a significant reduction in
the number of MSR protocol page state change requests when accepting
memory.
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/d6cbb21f87f81eb8282dd3bf6c34d9698c8a4bbc.1686063086.git.thomas.lendacky@amd.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions