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| author |   周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> | 2021-06-26 14:18:39 +0800 |
|---|---|---|
| committer |   Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2021-06-30 14:37:16 +0200 |
| commit | ab3040e1379bd6fcc260f1f7558ee9c2da62766b (patch) | |
| tree | 8d0032e101edf8d156c07c1842e1597ca7d35396 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | dt-bindings: clock: Add documentation for MAC PHY control bindings. (diff) | |
| download | wireguard-linux-ab3040e1379bd6fcc260f1f7558ee9c2da62766b.tar.xz wireguard-linux-ab3040e1379bd6fcc260f1f7558ee9c2da62766b.zip | |
MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs.
Add MAC syscon nodes for X1000 SoC and X1830 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Acked-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions