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| author |   Biju Das <biju.das@bp.renesas.com> | 2018-11-30 15:26:16 +0000 |
|---|---|---|
| committer |   Simon Horman <horms+renesas@verge.net.au> | 2018-12-04 05:55:49 -0800 |
| commit | d83010f87ab31861eacac1ffe1278f655a376268 (patch) | |
| tree | b311cc56d27ada57450694c4a90168650482670c /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | ARM: dts: r8a7744-iwg20m: Add iWave RZ/G1N Qseven SOM (diff) | |
| download | wireguard-linux-d83010f87ab31861eacac1ffe1278f655a376268.tar.xz wireguard-linux-d83010f87ab31861eacac1ffe1278f655a376268.zip | |
ARM: dts: r8a7744: Initial SoC device tree
Basic support for the RZ/G1N (R8A7744) SoC. Added placeholders
to avoid compilation error with the common platform code.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions