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| author |   Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> | 2018-04-20 21:28:16 +0900 |
|---|---|---|
| committer |   Simon Horman <horms+renesas@verge.net.au> | 2018-05-16 10:44:24 +0200 |
| commit | f37a7767f6c4ec66c3df227ad4028e5390322202 (patch) | |
| tree | ce8de40b2f87fe4756327206e29e76a50b6d86d5 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | arm64: dts: renesas: r8a77970: sort subnodes of the soc node (diff) | |
| download | wireguard-linux-f37a7767f6c4ec66c3df227ad4028e5390322202.tar.xz wireguard-linux-f37a7767f6c4ec66c3df227ad4028e5390322202.zip | |
arm64: dts: renesas: Add Renesas R8A77990 SoC support
This patch adds basic support for the Renesas R-Car E3 (R8A77990) SoC:
- PSCI
- CPU (single)
- Cache controller
- Main clocks and controller
- Interrupt controller
- Timer
- PMU
- Reset controller
- Product register
- System controller
- UART for console
Inspried by a patch by Takeshi Kihara in the BSP.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions