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| author |   Claudiu Beznea <claudiu.beznea@microchip.com> | 2023-06-15 12:32:27 +0300 |
|---|---|---|
| committer | Claudiu Beznea <claudiu.beznea@microchip.com> | 2023-06-21 10:42:48 +0300 |
| commit | 5619c2ddaf3ff77ce393716a6fed3267cb906344 (patch) | |
| tree | fb8c18bedfe2493540572e863d504b143ca6f3a3 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | clk: at91: sama7g5: switch to parent_hw and parent_data (diff) | |
| download | wireguard-linux-5619c2ddaf3ff77ce393716a6fed3267cb906344.tar.xz wireguard-linux-5619c2ddaf3ff77ce393716a6fed3267cb906344.zip | |
clk: at91: sama7g5: s/ep_chg_chg_id/ep_chg_id
s/ep_chg_chg_id/ep_chg_id in documentation of master clock structure.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20230615093227.576102-12-claudiu.beznea@microchip.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
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