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| author |   Chao Peng <chao.p.peng@linux.intel.com> | 2018-10-24 16:05:15 +0800 |
|---|---|---|
| committer |   Paolo Bonzini <pbonzini@redhat.com> | 2018-12-21 11:28:37 +0100 |
| commit | b08c28960f254bd246af8e30a468dfc7dd56e03b (patch) | |
| tree | 07ded28e09d131d36afc941e23fc422777f24bf2 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | KVM: x86: Implement Intel PT MSRs read/write emulation (diff) | |
| download | wireguard-linux-b08c28960f254bd246af8e30a468dfc7dd56e03b.tar.xz wireguard-linux-b08c28960f254bd246af8e30a468dfc7dd56e03b.zip | |
KVM: x86: Set intercept for Intel PT MSRs read/write
To save performance overhead, disable intercept Intel PT MSRs
read/write when Intel PT is enabled in guest.
MSR_IA32_RTIT_CTL is an exception that will always be intercepted.
Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com>
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions