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| author |   Dengcheng Zhu <dzhu@wavecomp.com> | 2018-12-26 22:08:52 +0000 |
|---|---|---|
| committer |   Paul Burton <paul.burton@mips.com> | 2018-12-27 02:58:58 -0800 |
| commit | d025bff1b6b923ce9c2f744d8278e0f2d6609eaf (patch) | |
| tree | c80c7dccafc44693585ba63e04b92cb4e0427199 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | MIPS: ralink: Select CONFIG_CPU_MIPSR2_IRQ_VI on MT7620/8 (diff) | |
| download | wireguard-linux-d025bff1b6b923ce9c2f744d8278e0f2d6609eaf.tar.xz wireguard-linux-d025bff1b6b923ce9c2f744d8278e0f2d6609eaf.zip | |
mailmap: Update name spelling and email for Dengcheng Zhu
Change my first name spelling from Deng-Cheng to Dengcheng.
Update email addresses.
Signed-off-by: Dengcheng Zhu <dzhu@wavecomp.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@linux-mips.org
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions