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| author |   Oleksij Rempel <o.rempel@pengutronix.de> | 2023-01-31 09:46:36 +0100 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2023-03-06 10:01:46 +0800 |
| commit | 088e350d2bb29756671f73639e65ba2b897e57a4 (patch) | |
| tree | 076ec926b29ce1ee7ca7da77144db97c8747e9ed /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | ARM: dts: imx6qdl-skov-cpu: configure ethernet reference clock parent (diff) | |
| download | wireguard-linux-088e350d2bb29756671f73639e65ba2b897e57a4.tar.xz wireguard-linux-088e350d2bb29756671f73639e65ba2b897e57a4.zip | |
ARM: dts: imx6dl-eckelmann-ci4x10: configure ethernet reference clock parent
On this board the PHY is the ref clock provider. So, configure ethernet
reference clock as input.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions