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author | 2025-01-02 18:20:18 +0800 | |
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committer | 2025-01-09 16:02:56 -0500 | |
commit | 4a60c55b3b0f147acc95c350c11f2db4d4828d36 (patch) | |
tree | ce98dc8191e9687e4ff212ce662a9fef4d7fd5a2 /tools/perf/scripts/python/exported-sql-viewer.py | |
parent | drm/amdkfd: Move gfx12 trap handler to separate file (diff) | |
download | wireguard-linux-4a60c55b3b0f147acc95c350c11f2db4d4828d36.tar.xz wireguard-linux-4a60c55b3b0f147acc95c350c11f2db4d4828d36.zip |
drm/amdgpu: fix incorrect active RB bitmap in setup RBs
The RB bitmap width per SA may be 0x1 for some ASICs.
Use the actual bitmap of SA instead of 0x3 to determine
the active RB bitmap.
Signed-off-by: Tim Huang <tim.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions