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author | 2019-08-23 09:02:36 +0200 | |
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committer | 2019-08-29 16:13:33 -0700 | |
commit | 5e975c5dab1e272fc758f26fd777d063951030b1 (patch) | |
tree | c398dcbb5482d00b73d6b80a995f5c1dc7783c1a /tools/perf/scripts/python/exported-sql-viewer.py | |
parent | arm64: dts: meson: fix ethernet mac reg format (diff) | |
download | wireguard-linux-5e975c5dab1e272fc758f26fd777d063951030b1.tar.xz wireguard-linux-5e975c5dab1e272fc758f26fd777d063951030b1.zip |
arm64: dts: meson-gx: drop the vpu dmc memory cell
This fixes the following DT schemas check errors:
meson-gxl-s805x-libretech-ac.dt.yaml: vpu@d0100000: reg-names: Additional items are not allowed ('dmc' was unexpected)
meson-gxl-s805x-libretech-ac.dt.yaml: vpu@d0100000: reg-names: ['vpu', 'hhi', 'dmc'] is too long
The 'dmc' register area was replaced by the amlogic,canvas property
which was introduced in commit f1726043426c73 ("arm64: dts: meson-gx:
add dmcbus and canvas nodes.") and commit cf34287986d0b6 ("arm64: dts:
meson-gx: Add canvas provider node to the vpu")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions