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| author |   Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2020-04-23 22:40:46 +0100 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2020-04-28 10:06:24 +0200 |
| commit | 6424962816ded55a01299c1458a2d21fadc779cc (patch) | |
| tree | 88c9d7622e71b7710bda7f3291fe1b4ecd9f0b13 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | MAINTAINERS: Add DT Bindings for Renesas Clock Generators (diff) | |
| download | wireguard-linux-6424962816ded55a01299c1458a2d21fadc779cc.tar.xz wireguard-linux-6424962816ded55a01299c1458a2d21fadc779cc.zip | |
dt-bindings: clock: renesas: cpg-mssr: Document r8a7742 binding
Add binding documentation for the RZ/G1H (R8A7742) Clock Pulse Generator
driver.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1587678050-23468-7-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions