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| author |   Jernej Skrabec <jernej.skrabec@siol.net> | 2018-12-03 20:58:56 +0100 |
|---|---|---|
| committer |   Maxime Ripard <maxime.ripard@bootlin.com> | 2018-12-04 08:43:58 +0100 |
| commit | 64f28430cf152e7e2836df37e51c56e31e3647c2 (patch) | |
| tree | 75cdf78ce26b01f2e73b61626a82fca4203c5bb9 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | clk: sunxi-ng: add support for suniv F1C100s SoC (diff) | |
| download | wireguard-linux-64f28430cf152e7e2836df37e51c56e31e3647c2.tar.xz wireguard-linux-64f28430cf152e7e2836df37e51c56e31e3647c2.zip | |
clk: sunxi-ng: h3: Allow parent change for ve clock
Cedrus driver wants to set VE clock higher than it's possible without
changing parent rate.
In order to correct that, allow changing parent rate for VE clock.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions