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| author |   Borislav Petkov <bp@suse.de> | 2020-05-05 19:27:16 +0200 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2020-05-07 13:50:32 +0200 |
| commit | 66abf2388331b800f290e854cca3ae71de7977fe (patch) | |
| tree | b0e527fe2a81164df8d6b4bf9275efe7d3869681 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | x86/cpu: Add a X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS() macro (diff) | |
| download | wireguard-linux-66abf2388331b800f290e854cca3ae71de7977fe.tar.xz wireguard-linux-66abf2388331b800f290e854cca3ae71de7977fe.zip | |
x86/apic: Convert the TSC deadline timer matching to steppings macro
... and get rid of the function pointers which would spit out the
microcode revision based on the CPU stepping.
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Mark Gross <mgross.linux.intel.com>
Cc: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20200506071516.25445-4-bp@alien8.de
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions