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| author |   Thierry Reding <treding@nvidia.com> | 2020-05-12 22:48:23 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2020-05-12 22:48:23 +0200 |
| commit | 7967175ad73b80d814217baec638b36c946fb283 (patch) | |
| tree | 06bb2cd80c908f38633cfec262d52bf999adbfff /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | Linux 5.7-rc1 (diff) | |
| parent | dt-bindings: clock: tegra: Add clock ID for CSI TPG clock (diff) | |
| download | wireguard-linux-7967175ad73b80d814217baec638b36c946fb283.tar.xz wireguard-linux-7967175ad73b80d814217baec638b36c946fb283.zip | |
Merge branch 'for-5.8/dt-bindings' into for-5.8/clk
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
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