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| author |   Oleksij Rempel <o.rempel@pengutronix.de> | 2023-01-31 09:46:34 +0100 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2023-03-06 10:01:46 +0800 |
| commit | c812c91bda8d3b4d9ea23c52bf88a20de64f7487 (patch) | |
| tree | b64eed14928481631a9bc043d09c2b6cbdda0b96 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | ARM: dts: imx6dl-victgo: configure ethernet reference clock parent (diff) | |
| download | wireguard-linux-c812c91bda8d3b4d9ea23c52bf88a20de64f7487.tar.xz wireguard-linux-c812c91bda8d3b4d9ea23c52bf88a20de64f7487.zip | |
ARM: dts: imx6q-prtwd2: configure ethernet reference clock parent
On this board the PHY is the ref clock provider. So, configure ethernet
reference clock as input.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions