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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2020-04-17 16:11:16 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-04-20 10:40:38 +0200 |
| commit | fdba377f962e50a2542e4d5709968c8d79f4815f (patch) | |
| tree | 015172b64cb61b40c415fcd407d1ea7aec4c1208 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | clk: renesas: r9a06g032: Fix some typo in comments (diff) | |
| download | wireguard-linux-fdba377f962e50a2542e4d5709968c8d79f4815f.tar.xz wireguard-linux-fdba377f962e50a2542e4d5709968c8d79f4815f.zip | |
MAINTAINERS: Add DT Bindings for Renesas Clock Generators
The "RENESAS CLOCK DRIVERS" section lacks the related DT bindings.
Add them.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20200417141116.23019-1-geert+renesas@glider.be
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions