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| author |   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2024-08-28 11:56:36 +0200 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2024-09-01 17:45:19 +0800 |
| commit | 0e49cfe364dea4345551516eb2fe53135a10432b (patch) | |
| tree | 3d83717517ff8954556906db22aabb4cde4f7c47 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | MAINTAINERS: correct TQ Systems DTS patterns (diff) | |
| download | wireguard-linux-0e49cfe364dea4345551516eb2fe53135a10432b.tar.xz wireguard-linux-0e49cfe364dea4345551516eb2fe53135a10432b.zip | |
ARM: dts: imx7d-zii-rmu2: fix Ethernet PHY pinctrl property
There is no "fsl,phy" property in pin controller pincfg nodes:
imx7d-zii-rmu2.dtb: pinctrl@302c0000: enet1phyinterruptgrp: 'fsl,pins' is a required property
imx7d-zii-rmu2.dtb: pinctrl@302c0000: enet1phyinterruptgrp: 'fsl,phy' does not match any of the regexes: 'pinctrl-[0-9]+'
Fixes: f496e6750083 ("ARM: dts: Add ZII support for ZII i.MX7 RMU2 board")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions