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| author |   Scott Wood <scottwood@freescale.com> | 2012-07-10 19:26:49 -0500 |
|---|---|---|
| committer |   Kumar Gala <galak@kernel.crashing.org> | 2012-07-11 07:49:34 -0500 |
| commit | 91a6f347921e9a65392301aecb218cb88d625528 (patch) | |
| tree | 4ed37c7076944a3c120a7989d7e08ef968d572cd /tools/perf/scripts/python/sctop.py | |
| parent | powerpc/fsl-pci: get PCI init out of board files (diff) | |
| download | wireguard-linux-91a6f347921e9a65392301aecb218cb88d625528.tar.xz wireguard-linux-91a6f347921e9a65392301aecb218cb88d625528.zip | |
powerpc/mpc85xx_ds: convert to unified PCI init
Similar to how the primary PCI bridge is identified by looking
for an isa subnode, we determine whether to apply uli exclusions
by looking for a uli subnode.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'tools/perf/scripts/python/sctop.py')
0 files changed, 0 insertions, 0 deletions