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| author |   Vivek Mahajan <vivek.mahajan@freescale.com> | 2009-12-08 13:01:15 +0530 |
|---|---|---|
| committer |   Kumar Gala <galak@kernel.crashing.org> | 2011-03-15 14:09:06 -0500 |
| commit | a2b31dd93000136d82f675952e322ec18973a348 (patch) | |
| tree | 6fcc4c42c9386d892a7f0a5559413fbf54691372 /tools/perf/scripts/python/sctop.py | |
| parent | powerpc/fsl: define binding for fsl mpic interrupt controllers (diff) | |
| download | wireguard-linux-a2b31dd93000136d82f675952e322ec18973a348.tar.xz wireguard-linux-a2b31dd93000136d82f675952e322ec18973a348.zip | |
powerpc/fsl: 85xx: document cache sram bindings
Adds binding documentation for cache sram for the PQ3 and some QorIQ
based platforms.
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'tools/perf/scripts/python/sctop.py')
0 files changed, 0 insertions, 0 deletions