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| author |   Hao Zhang <hao5781286@gmail.com> | 2018-11-21 23:44:47 +0800 |
|---|---|---|
| committer |   Maxime Ripard <maxime.ripard@bootlin.com> | 2018-11-22 09:18:34 +0100 |
| commit | 8cc77e014917c65f05a61503bf67d8a2daa0ed90 (patch) | |
| tree | f3a258bcccd348500d19129eb510c8f4e5b41bb2 /tools/perf/scripts/python/stackcollapse.py | |
| parent | ARM: dts: sunxi: Add all CPUs in cooling maps (diff) | |
| download | wireguard-linux-8cc77e014917c65f05a61503bf67d8a2daa0ed90.tar.xz wireguard-linux-8cc77e014917c65f05a61503bf67d8a2daa0ed90.zip | |
Documentation: ARM: sunxi: Add Allwinner SoC T3.
Add Allwinner SoC T3 document and fix format.
Signed-off-by: Hao Zhang <hao5781286@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions