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| author |   Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2018-08-10 23:23:38 +0530 |
|---|---|---|
| committer |   Wei Xu <xuwei5@hisilicon.com> | 2018-09-19 16:15:13 +0100 |
| commit | a446451d04b7e5ef0d9b328bdd52ffb784439871 (patch) | |
| tree | 2d3ccc879dc7b340cb12ab414b1df28092d648ff /tools/perf/scripts/python/stackcollapse.py | |
| parent | arm64: dts: Add devicetree for Hisilicon Hi3670 SoC (diff) | |
| download | wireguard-linux-a446451d04b7e5ef0d9b328bdd52ffb784439871.tar.xz wireguard-linux-a446451d04b7e5ef0d9b328bdd52ffb784439871.zip | |
dt-bindings: arm: hisilicon: Add binding for HiKey970 board
Add devicetree binding for HiKey970 board.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions