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| author |   Fabio Estevam <festevam@denx.de> | 2024-10-24 22:08:53 -0300 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2024-11-02 11:26:05 +0800 |
| commit | a72f3e951f67a8653aecd6ac580b460925479c8e (patch) | |
| tree | fec30c4d18b1b460803526dac269fbf2b30331b5 /tools/perf/scripts/python/stackcollapse.py | |
| parent | ARM: dts: imx6sll: Fix the last SPDIF clock name (diff) | |
| download | wireguard-linux-a72f3e951f67a8653aecd6ac580b460925479c8e.tar.xz wireguard-linux-a72f3e951f67a8653aecd6ac580b460925479c8e.zip | |
ARM: dts: imx6sll: Remove regulator-3p0 unit address
According to imx-thermal.yaml, the anatop regulators should not
contain unit-address/reg entries.
Change it accordingly.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions