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authorKrzysztof Hałasa <khalasa@piap.pl>2021-10-06 06:30:19 +0100
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>2021-10-19 08:08:38 +0100
commitd64a7709a81c298761aadc9690c110ee3fcc675a (patch)
treef6c09171088f38e94508f08579111862465b1c24 /tools/perf/scripts/python/stackcollapse.py
parentmedia: gspca/gl860-mi1320/ov9655: avoid -Wstring-concatenation warning (diff)
downloadwireguard-linux-d64a7709a81c298761aadc9690c110ee3fcc675a.tar.xz
wireguard-linux-d64a7709a81c298761aadc9690c110ee3fcc675a.zip
media: TDA1997x: replace video detection routine
The TDA1997x (HDMI receiver) driver currently uses a specific video format detection scheme. The frame (or field in interlaced mode), line and HSync pulse durations are compared to those of known, standard video modes. If a match is found, the mode is assumed to be detected, otherwise -ERANGE is returned (then possibly ignored). This means that: - another mode with similar timings will be detected incorrectly (e.g. 2x faster clock and lines twice as long) - non-standard modes will not work. This patch replaces this scheme with a direct read of geometry registers. This way all modes recognized by the chip are supported. In interlaced modes, the code assumes the V sync signal has the same duration for both fields. While this may be not necessarily true, I can't see any way to get the "other" V sync width. This is most probably harmless. All tests have been performed on Gateworks' Ventana GW54xx board, with a TDA19971 chip. Signed-off-by: Krzysztof Hałasa <khalasa@piap.pl> Tested-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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