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| author |   Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2014-05-13 01:02:11 +0200 |
|---|---|---|
| committer |   Vinod Koul <vinod.koul@intel.com> | 2014-06-01 22:56:30 +0530 |
| commit | a5cdc1c15562c0c68e7c418693f3f884ec838a06 (patch) | |
| tree | 82cde2cb9a7c7b1774334dac666a8c58035911d7 /tools/perf/scripts/python/syscall-counts.py | |
| parent | dmaengine: s3c24xx-dma: Add cyclic transfer support (diff) | |
| download | wireguard-linux-a5cdc1c15562c0c68e7c418693f3f884ec838a06.tar.xz wireguard-linux-a5cdc1c15562c0c68e7c418693f3f884ec838a06.zip | |
dmaengine: shdmac: Keep #include sorted alphabetically
This helps detecting duplicate includes.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions