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| author |   Martin Schwidefsky <schwidefsky@de.ibm.com> | 2011-07-24 10:48:29 +0200 |
|---|---|---|
| committer | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2011-07-24 10:48:22 +0200 |
| commit | c76e70d3784e00a89bf8359bcca51ae366b41527 (patch) | |
| tree | 4ac2570eed5edd4aa566510aa44a3dbd3c1bfdef /tools/perf/scripts/python/syscall-counts.py | |
| parent | [S390] iucv cr0 enablement bit (diff) | |
| download | wireguard-linux-c76e70d3784e00a89bf8359bcca51ae366b41527.tar.xz wireguard-linux-c76e70d3784e00a89bf8359bcca51ae366b41527.zip | |
[S390] initial cr0 bits
Remove outdated bits from the initial cr0 register.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions