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| author |   Roy Spliet <r.spliet@student.tudelft.nl> | 2010-10-20 01:09:56 +0200 |
|---|---|---|
| committer |   Ben Skeggs <bskeggs@redhat.com> | 2010-11-18 14:39:00 +1000 |
| commit | cac8f05b4294d18cfa940511c286ca03aa6590ad (patch) | |
| tree | b84940b2958474eb74852950beff09cdb14d1596 /tools/perf/scripts/python/syscall-counts.py | |
| parent | drm/nouveau: Make PCIE GART size depend on the available RAMIN space. (diff) | |
| download | wireguard-linux-cac8f05b4294d18cfa940511c286ca03aa6590ad.tar.xz wireguard-linux-cac8f05b4294d18cfa940511c286ca03aa6590ad.zip | |
drm/nouveau/pm: improve memtiming mappings
Improvements:
- Fix bug in switch statement
- Add parts of 0x10022c, 0x10023c
- Clean up 0x100234
- Comment out assumption in 0x100228 until verified
Signed-off-by: Roy Spliet <r.spliet@student.tudelft.nl>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions