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author | 2014-05-13 17:44:15 +0200 | |
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committer | 2014-06-11 09:58:43 +0200 | |
commit | e0e7943c55984e7dbae3d7d4c65f6b7ca2e61b81 (patch) | |
tree | 93dcb75d5095e9bca81e44fbb752440b0504e6e9 /tools/perf/scripts/python/syscall-counts.py | |
parent | Merge branch 'for-v3.16/ti-clk-drv' of github.com:t-kristo/linux-pm into clk-next (diff) | |
download | wireguard-linux-e0e7943c55984e7dbae3d7d4c65f6b7ca2e61b81.tar.xz wireguard-linux-e0e7943c55984e7dbae3d7d4c65f6b7ca2e61b81.zip |
clk: sunxi: Implement A31 USB clock
The A31 USB clock slightly differ from its older counterparts, mostly
because it has a different gate for each PHY, while the older one had
a single gate for all the phy.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions